Nottingham-based SFN (Search for the Next) has characterised its novel transistor-based logic, and claims that it matches CMOS performance even when made in older fabs. It would “enable chip designers ...

A technical paper titled “Analysis of Logic-in-Memory Full Adder Circuit With Floating Gate Field Effect Transistor (FGFET)” was published by researchers at Konkuk University, Korea National ...

UMC to port MoSys' one-transistor SRAM cell to advanced logic processes By Semiconductor Business News September 24, 2001 (12:01 p.m. EST) URL: http://www.eetimes.com ...