The chip was designed as part of Europe's broader effort to reduce reliance on non-European processor technologies.

The 2024 RISC-V Summit North America marked a significant milestone for the RISC-V community with the ratification of the RVA23 Profile. This event signifies a major step forward in the evolution of ...

The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...

RISC-V’s expanding role in AI is not a rejection of incumbent architectures, which continue to deliver performance and ...

After launching a mainboard with a StarFive JH7110 processor early last year, Deep Computing released a higher-performance ...

Forbes contributors publish independent expert analyses and insights. Dave Altavilla is a Tech Analyst covering chips, compute and AI. For decades, chip architectures have been dominated by a pair of ...

Have you ever wondered if there’s a way to break free from the dominance of proprietary computing architectures like x86 and ARM? For decades, these platforms have dictated the rules of the game, ...

RISC-V, pronounced “risk five,” is a modern open-source instruction set architecture (ISA) based on reduced instruction set computer (RISC) principles. In simple terms, it’s like a blueprint that ...

If you read Japanese, you might have seen the book “Design and Implementation of Microkernels” by [Seiya Nuda]. An appendix covers how to write your own operating system for RISC-V in about 1,000 ...

When the number two provider of CPU designs jumps on the RISC-V train, it is a significant milestone. The open-source RISC-V design is on a roll, displacing Arm in many SoC development plans. ARC and ...