In the race to deliver the first sub-90nm design tools, STMicroelectronics took the prize today when it announced that its 65nm CMOS design platform is now available for next-generation SoC ...

Low power design has become a cornerstone of modern integrated circuit development, driven by energy efficiency demands and the challenges of scaling in nanometre technologies. Innovations in ...

Spirea AB is a Swedish fabless semiconductor company developing highly integrated low-power, low-cost radio solutions for the Wireless LAN and PAN markets. This article describes how we assembled a ...

Creating a sensor-based IoT edge device is challenging, due to the multiple design domains involved. But, creating an edge device that combines the electronics using the traditional CMOS IC flow and a ...

Using a standard CMOS process, researchers have combined acoustic MEMS and other technology to create a >10-GHz on-chip resonator function for filters and VCOs. How standard CMOS process can be used ...

In the early '90s, many pessimists predicted that CMOS would hit a wall as it approached 100-nm and lower gate lengths toward the end of the century. But CMOS processes steadily marched forward, ...

Gaze into the temporal distance and you might spot the end of the age of silicon looming somewhere out there, as a research team at Penn State University claims to have built the first working CMOS ...

SI Sensors design novel CMOS image sensors for ultra-fast cameras that increase the velocity of the signal electrons allowing them to be swept out of the photodiode and be detected much faster.

Technologists describe a straight port of an existing bulk CMOS design to FD-SOI at the same node, obtaining the value of fully depleted SOI for a modest redesign effort. November 16th, 2012 - By: ...

At the Cannes Lions Festival this year, the prevailing sentiment was that humans and AI can coexist and that the human touch remains crucial in the AI era. I agree and have always believed in blending ...